CTU CAN FD - Test information
Test NamePurposeVRM Entries (What does the test verify)Test sequence
alc_base_id_feature_tb.vhdArbitration lost capture - Base ID feature test.
1. Arbitration within base identifier. Node loses arbitration on a bit where it send recessive and samples dominant.
2. Arbitration lost capture position within Base identifier.
1. Configure both Nodes to one-shot mode.
2. Loop by N between 1 and 11:
2.1 Generate two CAN frames. Both with base ID only. Both IDs are the same, appart from N-th bit. On N-th bit Node 1 will have Dominant Node 2 Recessive.
2.2 Wait till sample point on Node 1. Send frame 1 by Node 1 and frame 2 by Node 2 right one after another.
2.3 Wait till Arbitration field in Node 2. This is right after sample point of Node 2 in SOF or Intermission (if there is no SOF). Check that Node 2 is Transmitter.
2.4 Wait N-times till sample point in Node 2. After every wait before N is reached, check Node 2 is still transmitter. After N waits we are right after Sample point where Node 2 should have lost arbitration. Check Node 2 is receiver. Read content of ALC, check arbitration was lost at correct position.
2.5 Wait till the CRC delimiter in Node 2, and monitor that Node 2 is transmitting recessive value.
2.6 Wait till bus is idle! Check frame was sucessfully transmitted in Node 1. Check it was succesfully received in Node 2!
alc_id_extension_feature_tb.vhdArbitration lost capture - ID Extension feature test.
1. Arbitration within identifier extension. Node loses arbitration on a bit where it send recessive and samples dominant.
2. Arbitration lost capture position within Identifier extension
1. Configure both Nodes to one-shot mode.
2. Loop by N between 1 and 18:
2.1 Generate two CAN frames. Both with Extended ID. Both IDs have Base ID the same. N-th bit of ID Extension differs. On N-th bit Node 1 will have Dominant, Node 2 Recessive.
2.2 Wait till sample point on Node 1. Send frame 1 by Node 1 and frame 2 by Node 2 right one after another.
2.3 Wait till Arbitration field in Node 2. This is right after sample point of Node 2 in SOF or Intermission (if there is no SOF). Check that Node 2 is Transmitter.
2.4 Wait 11+1+1 (Base ID, RTR/SRR, IDE) times until sample point in Node 2.
2.5 Wait N-times till sample point in Node 2. After every wait before N is reached, check Node 2 is still transmitter. After N waits we are right after Sample point where Node 2 should have lost arbitration. Check Node 2 is receiver. Read content of ALC, check arbitration was lost at correct position.
2.6 Wait till the CRC delimiter in Node 2, and monitor that Node 2 is transmitting recessive value.
2.7 Wait till bus is idle! Check frame was sucessfully transmitted in Node 1. Check it was succesfully received in Node 2!
alc_srr_rtr_feature_tb.vhdArbitration lost capture - SRR/RTR bit feature test.
1. CAN frame with Extended Identifier loses arbitration on SRR bit when it receives dominant bit.
2. CAN RTR frame with base identifier only loses arbitration or RTR bit when it receives dominant bit.
3. Arbitration lost capture position on SRR/RTR bit after Base identifier.
1. Configure both Nodes to one-shot mode.
2. Generate two CAN frames: Frame 1 with Extended identifier, Frame 2 with Base Identifier only. Base identifier of both CAN frames is matching!
3. Wait till sample point in Node 1. Send Frame 1 by Node 1 and Frame 2 by Node 2.
4. Wait till arbitration field in Node 1. Wait till sample point 12 times (11 Base ID + RTR/SRR). Check Node 1 is transmitting recessive, Check Node 2 is transmitting dominant. Check Node 1 lost arbitration. Check Node 2 is still transmitter. Read ALC from Node 1 and check it.
5. Generate two CAN Frames: Frame 1 with Base ID. Frame 2 with Base ID equal to Frame 1 and RTR flag.
6. Wait till sample point in Node 1. Send Frame 1 by Node 1 and Frame 2 by Node 2.
7. Wait till arbitration field in Node 2. Wait till sample point 12 times (11 Base ID + RTR/SRR). Check Node 2 is transmitting recessive, Check Node 1 is transmitting dominant. Check Node 2 lost arbitration. Check Node 1 is still transmitter. Read ALC from Node 2 and check it.
alc_srr_rtr_2_feature_tb.vhdArbitration lost capture - SRR/RTR bit feature test 2.
1. CAN FD frame wins over CAN 2.0 RTR frame with the same identifier.
2. CAN FD frame wins over CAN frame with Extended identifier with the same base identifier.
3. Arbitration lost capture position on SRR/RTR bit after Base identifier.
1. Configure both Nodes to one-shot mode.
2. Generate two CAN frames: Frame 1 - CAN FD Base frame, Frame 2 - CAN 2.0 RTR frame with Base ID. Base identifier of both CAN frames is matching!
3. Wait till sample point in Node 1. Send Frame 1 by Node 1 and Frame 2 by Node 2.
4. Wait till arbitration field in Node 1. Wait till sample point 12 times (11 Base ID + RTR/SRR). Check Node 1 is transmitting dominant, Check Node 2 is transmitting recessive. Check Node 2 lost arbitration. Check Node 1 is still transmitter. Read ALC from Node 2 and check it.
5. Generate two CAN Frames: Frame 1 - CAN FD frame with Base ID. Frame 2 Frame with Extended Identifier.
6. Wait till sample point in Node 1. Send Frame 1 by Node 1 and Frame 2 by Node 2.
7. Wait till arbitration field in Node 2. Wait till sample point 12 times (11 Base ID + RTR/SRR). Check Node 2 is transmitting recessive, Check Node 1 is transmitting dominant. Check Node 2 lost arbitration. Check Node 1 is still transmitter. Read ALC from Node 2 and check it.
alc_ide_feature_tb.vhdArbitration lost capture - IDE bit feature test.
1. CAN frame with base identifier only wins arbitration over CAN frame with extended identifier when base identifier of both frames is equal.
2. Arbitration lost capture position on IDE bit after Base identifier.
1. Configure both Nodes to one-shot mode.
2. Generate two CAN frames: Frame 1 with Extended identifier, Frame 2 with Base Identifier only, RTR frame. Base identifier of both CAN frames is matching!
3. Wait till sample point in Node 1. Send Frame 1 by Node 1 and Frame 2 by Node 2.
4. Wait till arbitration field in Node 1. Wait till sample point 13 times (11 Base ID + RTR/SRR + IDE). Check Node 1 is transmitting recessive, Check Node 2 is transmitting dominant. Check Node 1 lost arbitration. Check Node 2 is still transmitter. Read ALC from Node 1 and check it.
alc_rtr_r0_feature_tb.vhdArbitration lost capture - RTR/r0 bit (after Identifier Extension) feature test.
1. RTR frame with Extended identifier loses arbitration against data frame with Extended Identifier.
2. Arbitration lost capture position on RTR/r0 bit after Base identifier.
1. Configure both Nodes to one-shot mode.
2. Generate two CAN frames: Frame 1 with Extended identifier RTR, Frame 2 with Extended Identifier, Data frame. Identifiers of both CAN frames are matching!
3. Wait till sample point in Node 1. Send Frame 1 by Node 1 and Frame 2 by Node 2.
4. Wait till arbitration field in Node 1. Wait till sample point 32 times (11 Base ID + RTR/SRR + IDE + 18 ID Extension + RTR/r0). Check Node 1 is transmitting recessive, Check Node 2 is transmitting dominant. Check Node 1 lost arbitration. Check Node 2 is still transmitter. Read ALC from Node 1 and check it.
alc_rtr_ext_id_feature_tb.vhdArbitration lost capture - RTR bit after Extended Identifier.
1. CAN RTR frame with extended identifier loses arbitration against CAN data frame with the same identifier.
3. Arbitration lost capture position on RTR bit after Extended identifier.
1. Configure both Nodes to one-shot mode.
2. Generate two CAN frames with both Extended matching Identifiers. Frame 1 is RTR frame, frame 2 is data frame.
3. Wait till sample point in Node 1. Send Frame 1 by Node 1 and Frame 2 by Node 2.
4. Wait till arbitration field in Node 1. Wait till sample point 31 times (11 Base ID + RTR/SRR + IDE + ID Extension + RTR). Check Node 1 is transmitting Recessive, Check Node 2 is transmitting Dominant. Check Node 1 lost arbitration. Check Node 2 is still transmitter. Read ALC from Node 1 and check it.
btr_feature_tb.vhdBTR (Bit timing register) feature test.
1. BTR register properly configures PROP, PH1, PH2 registers.
2. Transmission/reception at random bit-rate.
1. Disable both Nodes. Generate random bit-rate and configure it sa Nominal bit-rate! Enable both nodes and wait till both nodes are on.
2. Wait until sample point in Node 1 and measure number of clock cycles till next sample point. Check that it corresponds to pre-computed value!
3. Send frame by Node 1 and wait until it is sent. Read frame from Node 2 and check they are matching.
btr_fd_feature_tb.vhdBTR FD (Bit timing register - flexible data rate) feature test.
1. BTR FD register properly configures PROP, PH1, PH2 registers.
2. Transmission/reception at random bit-rate.
1. Disable both Nodes. Generate random bit-rate and configure it sa Data bit-rate! Nominal bit-rate remains the default one which was set by testbench.
2. Enable both Nodes and send CAN FD frame where bit-rate is shifted by Node 1. Wait until data field in Node 1 and measure duration till next sample point! Transmitter during Data phase shall no re-synchronize therefore, bit time will always have nominal length!
3. Wait until frame is sent and check it is correctly received by Node 2.
btr_minimal_feature_tb.vhdBTR (Bit timing register) - minimal settings feature test.
1. Node is able to send frame succesfully with maximal possible bit-rate (nominal and data), as specified by datasheet.
1. Configure highest possible bit-rate as given by datasheet in both nodes. Disable Secondary sampling point.
2. Configure small Transmitter delay, so that sampling in nominal bit rate will not fire an error.
3. Generate random frame which is FD frame with bit-rate shift. Send the frame by Node 1, receive it by Node 2 and check it.
btr_maximal_feature_tb.vhdBTR (Bit timing register) - maximal settings feature test.
1. Node is able to send frame succesfully with minimal possible bit-rate (nominal and data), as specified by datasheet.
1. Configure slowest possible bit-rate as given by datasheet in both nodes. Disable Secondary sampling point.
3. Generate random frame which is FD frame with bit-rate shift. Send the frame by Node 1, receive it by Node 2 and check it.
btr_ssp_access_feature_tb.vhdBTR, BTR_FD and SSP_CFG register access feature test.
1. When node is disabled SETTINGS[ENA]='0', BTR, BTR_FD and SSP_CFG registers are not writable. When node is enabled, they are writable!
1. Read values in BTR, BTR_FD and SSP_CFG registers. Try to write them, read them back and check that value has not changed! Node 1 is enabled!
2. Disable Node 1 and try to write BTR, BTR_FD and SSP_CFG registers. Read them back and check that value was written!
bus_start_feature_tb.vhdBus start feature test
1. CTU CAN FD can integrate to bus comunication within 11 consecutive recessive bits!
1. Disable both Nodes. Insert 2 frames to Node 1. Check both Nodes are Bus off. Enable Node 1.
2. Wait till sample point in Node 1 11 times, check that after 11 recesive bits, Node 1 becomes error active. Wait until Node 1 becomes transmitter.
3. Enable Node 2, wait until ACK field in Node 2. Force the bus low so that Node 1 receives ACK. Wait till Node 1 is not in ACK anymore. Check it is in ACK Delimiter!
4. Wait for 11 sample points in Node 2. Check that Node 2 became Error active (this should have occurred in ACK Delimiter + EOF + Intermission of Node 1).
5. Wait until CAN frame starts in Node 2. Check Node 2 turned receiver!
byte_enable_feature_tb.vhdByte enable feature test.
1. 8/16/32 bit read access.
2. 8/16/32 bit write access.
1. Disable Node 1 (so that BTR, BTR_FD are writable). Read 32-bit register via 32-bit access. Check correct value.
2. Read 32-bit register via 2 16 bit accesses. Check correct values.
3. Read 32-bit register via 4 8 bit accesses. Check correct values.
4. Erase 32-bit R/W register. Write pattern to a single byte. Read 32-bit check that pattern was written to single byte only and rest are zeroes. Repeat with each byte!
5. Erase 32-bit R/W register. Write pattern to lower half word. Read 32-bit, check that pattern was written to half word only and rest are zeroes. Repeat with upper half word!
command_rrb_feature_tb.vhdRelease receive buffer command feature test.
1. RX Buffer is reset by issuing COMMAND[RRB].
2. COMMAND[RRB] issued during CAN frame reception will erase RX Buffer properly, and RX buffer will remain consistent.
1. Check RX buffer in Node 1 is empty. Generate CAN frame and send it by Node 2. Wait until frame is sent. Check RX Buffer is not empty.
2. Issue COMMAND[RRB] and check that RX Buffer is empty again!
3. Send CAN frame by Node 2, wait until frame is sent and check that RX Buffer is not empty again.
4. Send frame by Node 2. Wait until Node 1 starts receiving. Wait for random amount of time and issue COMMAND[RRB]. Wait until bus is idle. RX Buffer can be either empty (command was issued after first word was stored), or there are is one frame (command was issued before first word was stored).
5. Send frame by Node 2 again. Wait until frame is sent and check it is properly received by Node 1.
command_cdo_feature_tb.vhdClear data overrun command feature test.
1. Data overrun flag is set when more frames are received than capacity of RX Buffer.
2. RX Buffer full is active when there is no free space available in RX Buffer.
3. COMMAND[CDO] will clear data overrun flag.
4. COMMAND[RRB] will clear data overrun flag.
1. Read size of RX Buffer in Node 1. Check that DOR flag is not set. Generate number of RTR CAN frames (4 words in RX Buffer) which exactly fill RX Buffer and send them by Node 2. Wait until frames are sent.
2. Read status of RX Buffer in Node 1. Check that RX Buffer full is active. Check that DOR flag is not set yet.
3. Send one more frame by Node 2 and wait until it is sent. Check that Data Overrun flag is set. Issue Clear Data Overrun Command. Check that CDO flag was cleared.
4. Again send frame by Node 2. Check DOR is set again. Issue Command[RRB]. Check Data Overrun Flag was cleared.
command_frcrst_feature_tb.vhdTX/RX frame counters clear command.
1. TX Frame counter is cleared by COMMAND[TXRFCRST].
2. TX Frame counter is not cleared by COMMAND[TXFRCRST].
3. RX Frame counter is cleared by COMMAND[RXRFCRST].
4. RX Frame counter is not cleared by COMMAND[RXFRCRST].
1. Generate and send frame by Node 2. Check that TX frame counter of Node 2 is not zero. Issue COMMAND[RXFRCRST] and check it is still not 0. Issue COMMAND[TXFRCRST] and check it is 0 now.
2. Check that RX Frame counter of Node 1 is not zero. Issue COMMAND[TXFRCRST] and check it is still not 0. Issue COMMAND[RXFRCRST] and RX Frame counter in Node 1 is 0.
command_ercrst_feature_tb.vhdError counters reset (reintegration request) command!
1. Reintegration is started by COMMAND[ERCRST] when unit is bus-off.
2. Reintegration is not finished before 128 consecutive occurences of 11 con secutive recessive bits!
1. Set Node 1 TXC to 256 via test mode. This should set node to bus-off.
2. When Node 1 becomes bus off, issue COMMAND[ERCRST] to Node 1. Wait until bus level is recessive (this should be in the start of Error delimiter). Now wait for 127 * 11 + 10 bits. Check that unit is still bus off! Wait for 30 more bits and check that Node 1 is now Error active!
device_id_feature_tb.vhdDevice ID feature test.
1. Correct device ID is read from DEVICE_ID register.
1. Read device ID and check it.
dlc_can20_8_64_bytes_feature_tb.vhdData length Code CAN 2.0 more than 8 bytes feature test.
1. When transmission of CAN 2.0 frame with DLC higher than 8 is requested, only 8 bytes are transmitted!
1. Generate CAN 2.0 Frame and set DLC higher than 8. Set higher data bytes accordingly!
2. Send the CAN Frame via Node 1. Monitor the bus and check that only 8 bytes are sent!
3. Verify that frame received by Node 2, has the same DLC, but is has received only 8 bytes of Data!
err_capt_ack_ack_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_ACK, ack error feature test.
1. Detection of ACK error in ACK slot (when dominant ACK was not send). Value of ERR_CAPT[ERR_POS] when ACK error should have been detected in ACK field.
1. Check that ERR_CAPT contains no error (post reset).
2. Configure Node 2 to ACK forbidden mode. Generate frame (use CAN 2.0 not to extend ACK field) and send it by Node 1. Wait until ACK field and monitor that it is recessive during whole duration of ACK field. Wait until Sample point and check that after it, error frame is transmitted by Node 1. Check that ERR_CAPT register signals ACK Error in ACK field.
err_capt_arb_bit_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_ARB, bit error feature test.
1. Detection of bit error in Arbitration field. Value of ERR_CAPT[ERR_POS] when bit error should have been detected in arbitration field.
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame and send it by Node 1. Wait until transmission starts and wait until arbitration field. Wait for random amount of time until Dominant bit is sent! Force bus low and wait until sample point. Check that Error frame is being transmitted. Check value of ERR_CAPT.
err_capt_arb_stuff_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_ARB, stuff error feature test.
1. Detection of stuff error in Arbitration field. Value of ERR_CAPT[ERR_POS] when stuff error should have been detected in arbitration field.
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame, force ID to contain first 4 bits dominant. Send such frame by Node 1. Wait until arbitration field in Node 1. Wait for 4 bits and after that force bit dominant (stuff bit should be recessive). Wait until Sample point and check that Error frame is being transmitted by Node 1. Check that ERR_CAPT signals Stuff Error during arbitration.
err_capt_crc_bit_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_CRC feature test - bit error.
1. Detection of bit error in CRC field.
2. Value of ERR_CAPT when bit error is detected in CRC field.
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame, send it by Node 1. Wait until CRC field. Wait for random duration of CRC field. Force bus to opposite value as transmitted bit wait until sample point. Check that error frame is being transmitted. Check that ERR_CAPT signals bit error in CRC field!
err_capt_crc_err_feature_tb.vhdERR_CAPT CRC error feature test.
1. Detection of CRC error when calculated CRC is not equal to received CRC. Value of ERR_CAPT when CRC error should have been detected in ACK field.
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame and send it by Node 1. Wait until CRC field in Node 2 and wait for random number of bits. Force CAN_RX of Node 2 for duration of 1 bit to opposite value (to mess up received CRC of Node 2). Wait until ACK bit in Node 1. Force bus low (as if other node is ACKing the frame) and wait until sample point. Wait until ACK delimiter of Node 2. Wait until Node 2 is NOT in ACK delimiter and check that it transmitts Error frame. Check that ERR_CAPT contains CRC Error.
err_capt_ctrl_bit_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_CTRL, bit error feature test.
1. Detection of bit error in IDE bit of frame with Base identifier!
2. Detection of bit error in EDL bit of CAN FD frame with Base identifier and with Extended Identifier!
3. Detection of bit error in ESI/BRS and DLC bit fields.
4. Value of ERR_CAPT[ERR_POS] when bit error shall be detected in control field of CAN frame!
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame (frame with Base ID only, CAN FD frames with Base and extended identifier, CAN FD frame with Base identifier), send it by Node 1. Wait until Arbitration field and until sample point of one bit before bit error shall be detected. Force bus to opposite value as shall be transmitted and wait until sample point. Check that Node is transmitting error frame. Check that ERR_CAPT signals Bit Error in Control field. Reset the node, Wait until integration is over and check that ERR_CAPT is at its reset value (this is to check that next loops will truly set ERR_CAPT). Repeat with each frame type!
err_capt_ctrl_form_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_CTRL, form error feature test.
1. Detection of form error in control field on r0 bit in CAN 2.0 base frame, on r0 bit in CAN FD base frame, on r1 bit in CAN 2.0 extended frame and r0 in CAN FD extended frame when protocol exception handling is disabled!
2. Value of ERR_CAPT[ERR_POS] when form error shall be detected in control field of CAN frame!
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame (CAN 2.0 Base only, CAN FD Base only, CAN 2.0 Extended, CAN FD extended), send it by Node 1. Wait until Arbitration field of the othter node and wait and wait for 13 (Base ID, RTR, IDE) or 14 (Base ID, RTR, IDE, EDL) or 32 bits (Base ID, SRR, IDE, Ext ID, RTR) or 33 (Base ID, SRR, IDE, Ext ID, RTR, EDL) bits based on frame type. Force bus Recessive (reserved bits are dominant) and wait until sample point. Check that Node is transmitting error frame. Check that ERR_CAPT signals Form Error in Control field. Reset the node, Wait until integration is over and check that ERR_CAPT is at its reset value (this is to check that next loops will truly set ERR_CAPT). Repeat with each frame type!
err_capt_data_bit_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_DATA feature test - bit error.
1. Detection of bit error in Data field.
2. Value of ERR_CAPT when bit error is detected in Data field.
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame, send it by Node 1. Wait until data field. Wait for random duration of data field. Force bus to opposite value as transmitted bit wait until sample point. Check that error frame is being transmitted. Check that ERR_CAPT signals bit error in data field!
err_capt_eof_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_EOF. Error code capture in End of frame feature test.
1. Detection of Form error in End of frame field. Value of ERR_CAPT when Form Error should have been detected in EOF field.
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame and send it by Node 1. Wait until End of frame field of Node 1 and wait for random number of bits (between 0 and 4). Force bus level dominant and wait until sample point. Check that Error frame is being transmitted and check value of ERR_CAPT.
err_capt_err_frm_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_ERR, Error code capture in Error frame feature test.
1. Value of ERR_CAPT register when Error is detected inside Error frame.
1. Check that ERR_CAPT contains no error (post reset).
2. Set Node 2 to ACK forbidden mode. Generate random frame and send it by Node 1. Wait until error frame is transmitted by Node 1. Wait for random amount of bits (0-5) and force bus to Recessive. Wait until sample point and check value of Error code capture in Node 1.
err_capt_sof_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_SOF feature test.
1. Detection of form error in SOF bit.
1. Generate CAN frame and send it by Node 1. Wait until transmission starts and force bus Recessive. Wait until sample point and check that Error frame is transmitted. Check that ERR_CAPT says that Form Error during SOF was detected!
err_capt_ovr_frm_feature_tb.vhdERR_CAPT[ERR_POS] = ERC_POS_OVRL, Error code capture in Overload frame feature test.
1. Value of ERR_CAPT register when Error is detected inside Overload frame.
1. Check that ERR_CAPT contains no error (post reset).
2. Generate CAN frame and send it by Node 1. Wait until intermission field and force bus low (overload condition). Check that Node 1 transmitts Overload frame. Wait for random number of bits (0-4) and force bus high for one bit time. Check that Node 1 is transmitting Error frame. Read Error code capture and check that error occured in Overload frame and it was a bit error!
err_norm_fd_feature_tb.vhdERR_NORM (Nominal bit-rate) error counter feature test.
1. ERR_NORM is incremented by 1 when error occurs for trasmitter/receiver during nominal bit-rate.
2. ERR_FD is not increented by 1 when error occurs for transmitter/receiver during nominal bit-rate.
3. ERR_NORM is not incremented by 1 when error occurs for trasmitter/receiver during data bit-rate.
4. ERR_FD is incremented by 1 when error occurs for trasmitter/receiver during data bit-rate.
1. Generate random frame where bit rate is not switched. Insert the frame to Node 1. Wait until Node 1 starts transmission. Wait for random time until Node 1 transmits Dominant bit. Force the bus-level Recessive for one bit time! This should invoke bit error in Node 1. Wait until bus is idle. Check that ERR_NORM in Node 1 and 2 incremented by 1. Check that ERR_FD in Node 1 and 2 remained the same!
2. Generate random frame where bit rate shall be switched. Wait until data portion of that frame. Wait until Recessive bit is transmitted. Force bus Dominant for 1 bit time! Wait until bus is idle. Check that ERR_FD incremented in Node 1 and Node 2 by 1. Check that ERR_NORM remained the same in Node 1 and Node 2.
error_rules_a_feature_tb.vhdFault confinement rules - rule A - feature test.
1. When a receiver detects an error, the receive error counter shall be incremented by 1, except when the detected error was a bit error during the sending of an active error flag or an overload flag.
1. Send CAN frame by Node 2. Wait until Node 2 is post arbitration and force bus value to opposite level it has transmitted. Check that error frame is transmitted by Node 2. Node 1 should hook up too by error frame. Wait until bus is idle and check that REC was incremented by 1 in Node 1.
2. Send CAN frame by Node 2. Wait until Node 2 is post arbitration and force bus value to opposite level it has transmitted. Check that error frame is transmitted by Node 2. Release bus-level. Wait until Error frame in Node 1 and check that Node 1 RX counter was incremented by 1. Force bus high and wait for 16 bit times. Release bus-level and check that RX Error counter was incremented by 129 (1 for initial increment, 16 times recessive bit was sampled during Error frame).
error_rules_b_feature_tb.vhdFault confinement rules - rule B - feature test.
1. When a receiver detects a dominant bit as the first bit after sending an error flag, the receive error counter shall be incremented by 8.
1. Set Node 2 not to accept CAN FD frames. Transmitt CAN FD frame by Node 1 and Wait until Error frame in Node 2. Read Error counters of Node 2. Wait for 7 sample points (Error flag + 1st bit post Error flag) of Node 2 and check that sampled value is dominant and sent is recessive. Read RX Error counter and check that it was incremented by 8. Check that TX Error counter is the same as before!
error_rules_c_feature_tb.vhdFault confinement rules - rule C - feature test.
1. When a transmitter sends an error flag, the transmit error counter shall be incremented by 8. Exception 1: If the transmitter is error-passive and detects an ACK error because of not detecting a dominant ACK and does not detect a dominant bit while sending its passive error flag. Exception 2: If the transmitter sends an error flag because a stuff error occurred during arbitration, whereby the stuff bit should have been recessive, and has been sent recessive but is monitored to be dominant.
2. ERR_CAPT[ERR_POS] = Arbitration and Stuff Error!
1. Set Node 2 to ACK forbidden and test modes. Set Node 1 to One-shot mode. Send CAN frame by Node 1. Wait until CAN frame is sent and check that TX Error counter of Node 1 has incremented by 8. Check that RX Error counter is not incremented in Node 1.
2. Set Node 1 to Error Passive (via CTR_PRES). Send CAN frame and wait until it is sent. Check that TX Error counter was not incremented. Check that RX Error counter was not incremented. Reset Error counters.
3. Generate CAN frame with Recessive Stuff bit in CAN ID. Send such frame by Node 1 and force that Stuff bit to Dominant. Check that Error frame was transmitted. Check that Stuff Error occured during arbitraton. Check that TEC was not incremented in Node 1! Check that REC was incremented by 1 in Node 2.
4. Generate CAN frame with Dominant Stuff bit in CAN ID. Send such frame by Node 1 and force that Stuff bit to Recessive. Check that Error frame was transmitted. Check that Stuff Error (or bit error) occured during arbitration. Check that TX Error counter was incremented by 8 in Node 1. Check that REC was incremented by 1 in Node 2!
error_rules_d_feature_tb.vhdFault confinement rules - rule D - feature test.
1. If a transmitter detects a bit error while sending an active error flag or an overload flag, the transmit error counter shall be incremented by 8.
1. Set Node 2 to ACK forbidden mode. Generate CAN frame and send it by Node 1. Wait until Error frame is sent by Node 1. Wait for random amount of bits (0-5) and force bus level to recessive for duration of one bit time. Wait until bus is idle and check that TX Error counter was incremented by 16 (first ACK error, next bit error during Error frame)!
2. Unset ACK Forbidden in Node 2. Generate CAN frame and send it by Node 1. Wait until Intermission in Node 1 and force bus low for duration of one bit time (overload condition). Check that overload frame is being tran smitted. Wait for random amount of bits (0-5) and force bus level to recessive for one bit-time. Wait until bus is idle and check that TX Error counter was incremented by 7 (incremented by 8, but decremented by 1 due to tran frame valid!)
error_rules_e_feature_tb.vhdFault confinement rules - rule E - feature test.
1. If a receiver detects a bit error while sending an active error flag or an overload flag, the receive error counter shall be incremented by 8.
1. Set Node 2 to ACK forbidden mode. Generate CAN frame and send it by Node 1. Wait until Error frame is sent by Node 2. Wait for random amount of bits (0-5) and force bus level to recessive. Wait until sample point and check that RX Error counter was incremented by 9 (first form error in EOF, next bit error during Error frame)! Wait until bus is idle!
2. Unset ACK Forbidden in Node 2. Generate CAN frame and send it by Node 1. Wait until Intermission in Node 2 and force bus low for duration of one bit time (overload condition). Check that overload frame is being tran smitted. Wait for random amount of bits (0-5) and force bus level to recessive for one bit-time. Wait until bus is idle and check that RX Error counter was incremented by 7 (incremented by 8, but decremented by 1 due to tran frame valid!)
error_rules_f_tx_feature_tb.vhdFault confinement rules - rule F - transmitter - feature test
1. Any node shall tolerate up to 7 consecutive dominant bits after sending an active error flag, passive error flag, or overload flag. After detecting 14 consecutive dominant bits (in case of an active error flag or an overload flag) or after detecting 8 consecutive dominant bits following a passive error flag, and after each sequence of additional 8 consecutive dominant bits, every transmitter shall increment its transmit error counter by 8 and every receiver shall increment its receive counter by 8.
1. Set Node 2 to ACK forbidden mode. Send frame by Node 1. Wait until Error frame is sent by Node 1. Force bus low and wait for 7 bits. Check that Error counter is still the same as after Error frame started! Wait for one more bit and check that TEC counter was incremented by 8! Wait for 7 bits and check that TEC remains the same. Wait for one more bit and check that TEC is incremented again by 8. Release the bus and Wait until bus is idle!
2. Set Node 1 to Error passive. Send frame by Node 1 and wait until Error frame is sent. Repeat the same procedure as in Step 1. Afterwards release the bus and wait until bus is idle!
3. Unset ACK forbidden mode in Node 2. Send frame by Node 1. Wait until Intermission of Node 1 and force bus low. Wait until Overload frame is sent. Repeat the procedure from step 1. Release the bus and wait until bus is idle!
error_rules_f_rx_feature_tb.vhdFault confinement rules - rule F - receiver - feature test
1. Any node shall tolerate up to 7 consecutive dominant bits after sending an active error flag, passive error flag, or overload flag. After detecting 14 consecutive dominant bits (in case of an active error flag or an overload flag) or after detecting 8 consecutive dominant bits following a passive error flag, and after each sequence of additional 8 consecutive dominant bits, every transmitter shall increment its transmit error counter by 8 and every receiver shall increment its receive counter by 8.
1. Set Node 2 to ACK forbidden mode. Send frame by Node 1. Wait until Error frame is sent by Node 2. Force bus low and wait for 7 bits. Check that Error counter is still the same as after Error frame started! Wait for one more bit and check that TEC counter was incremented by 8! Wait for 7 bits and check that TEC remains the same. Wait for one more bit and check that TEC is incremented again by 8. Release the bus and Wait until bus is idle!
2. Set Node 2 to Error passive. Send frame by Node 1 and wait until Error frame is sent by Node 2. Repeat the same procedure as in Step 1. Afterwards release the bus and wait until bus is idle!
3. Unset ACK forbidden mode in Node 2. Send frame by Node 1. Wait until Intermission of Node 2 and force bus low. Wait until Overload frame is sent. Repeat the procedure from step 1. Release the bus and wait until bus is idle!
error_rules_g_feature_tb.vhdFault confinement rules - rule G - feature test.
1. After the successful transmission of a frame (getting ACK and no error has been detected until EOF is finished), the transmit error counter shall be decremented by 1 unless it was already 0.
1. Set TEC of Node 1 to random value till 255. Send frame by Node 1, wait till end of EOF and check that TEC is decremented at the end of EOF!
2. Set TEC of Node 1 to 0. Send frame by Node 1. Wait until frame is sent and check that TEC is still 0!
fault_state_feature_tb.vhdFAULT_STATE register feature test.
1. Fault confinement state change from Error Active to Error Passive and vice versa.
2. Fault confinement state change from Error Passive to Bus-off.
3. Fault confinement state change from Bus-off to Error active (after reintegration).
1. Turn on Test mode in Node 1. Generate random value of Error counters below default value of ERP and set them in Node 1. Check Fault state is Error active.
2. Generate RX counter to be between ERP and 255 included and set it in Node 1. Check that Node 1 Fault state is Error Passive.
3. Generate also TX counter to be between 128 and 255 included and set it in Node 1. Check that Node 1 Fault state is still Error Passive. Lower RX Counter below ERP and check Node 1 is still Error Passive. Lower also TX Counter below ERP and check that now the node became Error active!
4. Increment RX Error counter to more than 255 and check that Node 1 is Error Passive (should not go to bus-off by RX Counter).
5. Increment TX Counter to go above 255 and check that Node 1 is now bus off.
6. Issue COMMAND[ERCRST] and wait for 129*11 recessive bits. Check that Node 1 becomes Error Active.
glitch_filtering_feature_tb.vhdGlitch filtering during Bus idle feature test.
1. Device is able to filter out glitches shorter than duration of TSEG1 during Bus idle (it will not interpret them as SOF).
1. Read bit timing config from Node 1. Calculate duration of TSEG1. Force CAN RX of Node 1 low for TSEG1-1 Tim quanta Release CAN TX, and check that Node 1 did NOT turn receiver.
2. Force CAN RX of Node 1 low for TSEG1 Time quanta. Release CAN TX and check that Node 1 did turn receiver.
mode_loopback_feature_tb.vhdLoopback mode - feature test.
1. Transmitted CAN frame will be also received in Loopback mode when frame is transmitted successfully.
2. Transmitted CAN frame will not be received in Loopback mode when error frame occurs.
3. Transmitted CAN frame will not be received be node itself when Loopback mode was disabled.
1. Configure Loopback mode in Node 1.
2. Generate random CAN frame and send it by Node 1.
3. Wait until frame is received. Check that Node 1 has 1 frame in RX Buffer.
4. Read CAN frame from Node 1. Check it is the same as transmitted frame. Check that there are 0 frames in RX Buffer of Node 1. Read also frame from Node 2 not to leave it hanging there!
5. Set Node 2 to Acknowledge forbidden mode. Set Node 1 to one shot mode.
6. Generate random CAN frame and send it by Node 1.
7. Wait until transmission is over. Check that TXT Buffer used for transmi ssion is in TX failed. Check that RX Buffer in Node 1 has no frame.
8. Disable Loopback mode in Node 1. Disable Acknowledge forbidden mode in Node 2.
9. Send CAN frame by Node 1. Wait until frame is over. @10. Check that RX Buffer of Node 1 has no CAN frame received. Check that RX Buffer of Node 2 has frame received.
mode_bus_monitoring_feature_tb.vhdBus monitoring mode - feature test.
1. No frame is transmitted during Bus monitoring mode.
2. No dominant bit is transmitted in Bus monitoring mode. ACK and Error frames are re-reouted internally and bus remains unchanged!
1. Configure Bus monitoring mode in Node 1. Set Self test mode in Node 2.
2. Insert frame for transmission to Node 1. Check for sufficiently long that it will NOT be transmitted (TXT Buffer goes to failed and no transmission is started).
3. Send CAN frame by Node 2. Wait till ACK field.
4. Monitor bus during whole ACK field, check that it is recessive. Wait till bus is idle.
5. Check that frame was received by Node 1.
6. Set Node 1 to NON-ISO FD. Send CAN FD frame by Node 2.
7. Wait till error frame transmitted by Node 1 (should come as CRC is now different).
8. Monitor during whole Error frame transmitted by Node 1, that recessive value is sent on the bus by Node 1! Wait until bus is idle. Check afterwards that frame was sent OK by Node 2.
mode_self_test_feature_tb.vhdSelf test mode - feature test.
1. In Self test mode, transmitted frame is valid even if ACK was recessive!
1. Configures Self Test mode in Node 1. Configure ACK forbidden in Node 2.
2. Send frame by Node 1. Wait till ACK field.
3. Monitor during whole ACK field that frame bus is RECESSIVE.
4. Check that after ACK field, Node 1 is NOT transmitting Error frame! Wait till bus is idle and check that TXT Buffer in Node 1 is in TX OK! Check that frame was received by Node 2.
mode_frame_filters_feature_tb.vhdFrame filters mode feature test.
1. When in Frame filters mode, RX frame which does not pass frame filters will not be received!
2. When in Frame filters mode, RX frame which does pass frame filters will be received.
3. When not in frame filters mode, RX frame which does not pass frame filters will be received.
1. Configure frame filters mode in Node 1. Configure filter A to receive only can frames with Odd base IDs (lowest bit = 1). Configure all other filters not to accept any frames (disable all frame/identifier type combinations).
2. Generate random CAN frame and send by Node 2. Wait till frame is received. If frame should be received (LSB of ID=1), check it is received. If it should not be received, check it is not received!
3. Disable frame filters mode in Node 1. Send CAN frame with LSB of ID=0, (should not be received according to frame filters settings).
4. Wait till frame passes and check it is received in Node 2!
mode_fd_enable_feature_tb.vhdFlexible data-rate enable feature test!
1. CAN FD frame (EDL bit recessive) is received OK when Flexible data-rate mode is enabled (as default).
2. Receiving CAN FD frame results in Error frame when Flexible data-rate mode is disabled.
3. Transmitting CAN FD frame when Flexible data-rate mode is disabled results in transmission of CAN 2.0 frame only!
1. Send CAN FD frame by Node 2. Wait till frame is sent. Read it from Node 1 and compare it with send frame.
2. Disable Flexible data-rate mode in Node 1. Send CAN frame by Node 2. Wait till Control field of Node 1. Set both nodes to One-shot mode.
3. Wait till Node 1 is not in Control field. Check that it is transmitting error frame. Read Error code capture and check that it shows Form Error during Control field. Wait till the frame is transmitted.
4. Set Node 2 to Acknowledge forbidden mode. Transmitt frame by Node 1. Wait till it is sent, read Error code capture and check it is NOT equal to Form error (this is just to achieve change in Error code capture).
5. Unset ACK forbidden in Node 2. Send CAN FD frame by Node 1.
6. Wait until frame is sent and check that it is received OK in node 2. Make sure it CAN 2.0 frame.
mode_rst_feature_tb.vhdSoft reset feature test.
1. Reset value of all memory registers.
2. MODE[RST] will reset all the memory registers.
1. Write all RW registers to random value. Check they were written.
2. Execute SW reset via MODE[RST].
3. Read all registers and check they return their reset value.
mode_test_feature_tb.vhdTest mode - feature test.
1. EWL register is writable in test mode, not writable when not in test mode.
2. ERP register is writable in test mode, not writable when not in test mode.
3. CTR_PRES register is writable in test mode, not writable when not in test mode.
1. Configure test mode in Node 1. Check that EWL and ERP are equal to its reset values!
2. Generate random values and store them to EWL, ERP. Read back and check that both were properly written!
3. Disable test mode in Node 1. Generate random values and store them to EWL and ERP. Read back and check that values were NOT written!
4. Enable test mode in Node 1. Read each error counter and check it is 0! Set each error counter to random value via CTR_PRES. Read back and check that value was written!
5. Disable test mode in Node 1. Set each error counter to random values and check that these values were NOT written (counters equal to previous values).
mode_fdrf_feature_tb.vhdFDRF (Filter drop remote frame) feature test.
1. When SETTINGS[FDRF] is set, CTU CAN FD drops filters out RTR frames.
1. When SETTINGS[FDRF] is NOT set, CTU CAN FD accepts RTR frames.
1. Configure frame filters in Node 1. Enable SETTINGS[FDRF]. Configure filter A to accept any identifier (mask = all zeroes).4
2. Send RTR frame by Node 2. Wait until frame is sent and check that there is no frame received by Node 1.
3. Disable SETTINGS[FDRF] in Node 1.
4. Send RTR frame by Node 2. Wait until frame is sent and check that frame is received by Node 1.
mode_restr_op_feature_tb.vhdRestricted operation mode - feature test.
1. When error is detected in ROM mode, Integration is entered and REC, or TEC are not modified!
2. TXT Buffer after issuing Set Ready command in ROM mode, will end up in TX Failed and no frame will be transmitted!
3. When Overload condition is detected by CTU CAN FD in ROM mode (last bit of EOF, first two bits of Intermission), it enters bus integration state.
4. Node is able to receive next frame right after detecting Error in restricted operation mode.
5. Node in restricted operation mode sends ACK bit dominant!
1. Configure ROM mode in Node 1. Insert frame to TXT buffer and issue Set ready command. Verify that TXT buffer ends up in TX failed. Check that unit is not transmitter. Repeat several times in a row.
2. Send frame by Node 2 with stuff bit. Force this stuff bit to opposite value on CAN RX of Node 1. Check that Node 1 goes to integrating. Check that REC/TEC of Node 1 are not changed.
3. Node 2 will retransmitt frame from previous step. Wait until ACK field in Node 1. Check that Node 1 is transmitting dominant bit.
4. Wait until EOF field of Node 1. Wait randomly for 7,8,9 bits to offset to last bit of EOF or first/second bit of Intermission. Force CAN bus to dominant. Check that Node 1 will end in integration state (and not in overload state).
mode_pex_feature_tb.vhdProtocol exception mode test.
1. Functionality of Protocol exception mode (SETTINGS[PEX]) in all four combinations : CAN 2.0, FD Tolerant, FD Enabled, FD Enabled with PEX.
2. Functionality of Protocol exception status (STATUS[PEXS]).
1. First part - CAN 2.0 - no protocol exception.
1.1 Configure SETTINGS[PEX]=0 and MODE[FDE]=0 in Node 1. Send CAN FD frame by Node 2.
1.2 Wait until start of r0/FDF bit. Wait one more bit and check that Node 1 is sending error frame. Wait till end of frame.
1.3 Check that STATUS[PEXS] is not set (no Protocol exception occured).
2. Second part - CAN FD Tolerant
2.1 Configure SETTINGS[PEX]=1 and MODE[FDE]=0 in Node 1. Send CAN FD frame by Node 2.
2.2 Wait until start of r0/FDF bit. Wait one more bit and check that Node 1 is NOT sending error frame. Check that node is idle (in inte gration state). Wait till end of frame.
2.3 Check that STATUS[PEXS] is set. Clear it via COMMAND[CPEXS] and check that it has been cleared.
3. Third part - CAN FD Enabled - no protocol exception
3.1 Configure SETTINGS[PEX]=0 and MODE[FDE]=1 in Node 1. Send CAN FD frame by Node 2.
3.2 Wait till start of r0 bit (after FDF) in Node 2 and force CAN RX of Node 1 to Recessive value.
3.3 Wait till start of next bit, release the force, and check that Node 1 is transmitting Error frame. Wait till end of frame.
3.4 Check that STATUS[PEXS] is not set.
4. Fourth part - CAN FD Enabled - protocol exception
4.1 Configure SETTINGS[PEX]=1 and MODE[FDE]=1 in Node 1. Send CAN FD frame by Node 2.
4.2 Wait till start of r0 bit (after FDF) in Node 2 and force CAN RX of Node 1 to Recessive value.
4.3 Wait till start of next bit, release the force, and check that Node 1 is NOT transmitting Error frame and that it is idle. Wait till end of frame.
4.4 Check that STATUS[PEXS] is set. Clear it via COMMAND[CPEXS] and check that it has been cleared.
int_rx_feature_tb.vhdInterrupt RX feature test.
1. RX Interrupt is set when frame is received OK in EOF field.
2. RX Interrupt causes INT to go high when it is enabled.
3. RX Interrupt causes INT to go low when it is disabled.
4. RX Interrupt is cleared by write to INT_STATUS register.
5. RX Interrupt is not set when Error frame occurs.
6. RX Interrupt is not set when it is masked.
7. RX Interrupt enable is manipulated properly by INT_ENA_SET and INT_ENA_CLEAR.
8. RX Interrupt mask is manipulated properly by INT_MASk_SET and INT_MASK_CLEAR.
9. RX Interrupt is not set when frame was transmitted.
1. Unmask and enable RX Interrupt, disable and mask all other interrupts on Node 1.
2. Set Retransmitt limit to 0 on Node 2 (One shot-mode). Enable Retransmitt limitations on Node 2. Send frame by Node 2.
3. Monitor Node 1 frame, check that in the beginning of EOF, Interrupt is Not set, after EOF it is set.
4. Check that INT pin is high. Disable RX Interrupt and check that INT pin goes low. Enable Interrupt and check it goes high again.
5. Clear RX Interrupt, check it is cleared and INT pin goes low.
6. Send Frame by Node 2. Force bus level during ACK to recessive, check that error frame is transmitted by both nodes. Wait till bus is idle, check that no RX Interrupt was set, INT pin is low.
7. Mask RX Interrupt. Send frame by Node 2. Check that after frame RX Interrupt was not set. Check that INT pin is low.
8. Unmask RX Interrupt. Send frame by Node 2. Check that after frame RX Interrupt was set. Check INT pin is high.
9. Disable RX Interrupt, check that RX interrupt was disabled. @10. Enable RX Interrupt, check that RX interrupt was enabled.
11. Mask RX Interrupt, check RX Interrupt is Masked.
12. Un-Mask RX Interrupt, check RX Interrupt is Un-masked.
13. Send frame by Node 1. Check that after frame RX Interrupt is not set and Interrupt pin remains low.
int_tx_feature_tb.vhdInterrupt TX feature test.
1. TX Interrupt is set when frame is transmitted OK in EOF field. Note: This test is not testing that TX frame is validated in correct moment!
2. TX Interrupt causes INT to go high when it is enabled.
3. TX Interrupt causes INT to go low when it is disabled.
4. TX Interrupt is cleared by write to INT_STATUS register.
5. TX Interrupt is not set when Error frame occurs.
6. TX Interrupt is not set when it is masked.
7. TX Interrupt enable is manipulated properly by INT_ENA_SET and INT_ENA_CLEAR.
8. TX Interrupt mask is manipulated properly by INT_MASk_SET and INT_MASK_CLEAR.
9. TX Interrupt is not set when frame was transmitted.
1. Unmask and enable TX Interrupt, disable and mask all other interrupts on Node 1.
2. Set Retransmitt limit to 0 on Node 1 (One shot-mode). Enable Retransmitt limitations on Node 1. Send frame by Node 1.
3. Monitor Node 1 frame, check that in the beginning of EOF, Interrupt is Not set, after EOF it is set.
4. Check that INT pin is high. Disable TX Interrupt and check that INT pin goes low. Enable Interrupt and check it goes high again.
5. Clear TX Interrupt, check it is cleared and INT pin goes low.
6. Send Frame by Node 1. Force bus level during ACK to recessive, check that error frame is transmitted by both nodes. Wait till bus is idle, check that no TX Interrupt was set, INT pin is low.
7. Mask TX Interrupt. Send frame by Node 1. Check that after frame TX Interrupt was not set. Check that INT pin is low.
8. Unmask TX Interrupt. Send frame by Node 2. Check that after frame TX Interrupt was set. Check INT pin is high.
9. Disable TX Interrupt, check that TX interrupt was disabled. @10. Enable TX Interrupt, check that TX interrupt was enabled.
11. Mask TX Interrupt, check TX Interrupt is Masked.
12. Un-Mask TX Interrupt, check TX Interrupt is Un-masked.
13. Send frame by Node 1. Check that after frame TX Interrupt is not set and Interrupt pin remains low.
int_ewl_feature_tb.vhdInterrupt EWL feature test.
1. EWL Interrupt is set when TX Error counter is more or equal to EWL.
2. EWL Interrupt is set when RX Error counter more or equal to EWL.
3. EWL Interrupt is not set when either TX or RX Interrupt more or equal to EWL, and EWL Interrupt is masked.
4. EWL Interrupt causes INT to go high when it is enabled.
5. EWL Interrupt causes INT to go low when it is disabled.
6. EWL Interrupt is cleared by write to INT_STATUS register.
7. EWL Interrupt enable is manipulated properly by INT_ENA_SET and INT_ENA_CLEAR.
8. EWL Interrupt mask is manipulated properly by INT_MASK_SET and INT_MASK_CLEAR.
9. EWL Interrupt is set when RX Error counter becomes less than or equal to EWL. @10. EWL Interrupt is set when TX Error counter becomes less than or equal to EWL.
1. Unmask and enable EWL Interrupt, disable and mask all other interrupts on Node 1. Turn on Test mode (to manipulate error counters via CTR_PRES). Leave default value of EWL (96).
2. Set TX Error counter to 96. Check that EWL Interrupt was set. Check that EWL Interrupt is set and INT pin is high.
3. Disable EWL Interrupt and check INT pin goes low. Enable EWL Interrupt and check INT pin goes high.
4. Clear EWL Interrupt and check it not set. Set TX Error counter to 95. Check EWL is set. Clear EWL Interrupt. Check EWL interrupt is cleared.
5. Set RX Error counter to 96. Check that EWL Interrupt was set. Check that INT pin goes high.
6. Disable EWL Interrupt and check INT pin goes low. Enable EWL Interrupt and check INT pin goes high again.
7. Clear EWL Interrupt. Check that EWL Interrupt is not set. Set RX Error counter to 95. Check EWL is set. Check INT pin goes high and Interrupt is set. Clear the interrupt and check.
8. Mask EWL Interrupt. Set TX Error counter to 96. Check that EWL interrupt was not set.
9. Disable EWL Interrupt and check it was disabled. Enable EWL Interrupt and check it was enabled. @10. Mask EWL Interrupt and check it was masked. Un-mask EWL Interrupt and check it was un-masked.
int_do_feature_tb.vhdInterrupt DOI feature test.
1. DO Interrupt is set when there is an attempt to write to full RX FIFO.
2. DO Interrupt is not set when there is a write to RX FIFO which just fills the last words in the FIFO.
3. DO Interrupt is not set when it is masked.
4. DO Interrupt causes INT to go high when it is enabled.
5. DO Interrupt causes INT to go low when it is disabled.
6. DO Interrupt is cleared by write to INT_STATUS register.
7. DO Interrupt enable is manipulated properly by INT_ENA_SET and INT_ENA_CLEAR.
8. DO Interrupt mask is manipulated properly by INT_MASK_SET and INT_MASK_CLEAR.
1. Unmask and enable DO Interrupt, disable and mask all other interrupts on Node 1.
2. Read RX Buffer size of Node 1 and send number of RTR frames by Node 2 which will just fill RX Buffer of Node (no overrun yet). Check DO Interrupt is not set and INT pin is low after each frame.
3. Send one more frame which should cause Data overrun by Node 2. Check that DO Interrupt is set. Check that INT pin is high.
4. Disable DO Interrupt and check INT pin goes low. Enable DO Interrupt and check INT pin goes high.
5. Clear DO Interrupt and check it is still set (Data overrun flag is still set).
6. Clear Data overrun flag, clear DO Interrupt. Check DO Interrupt is cleared. Check INT pin goes low.
7. Mask DO Interrupt. Send one frame by Node 2. Check that DO Interrupt is not set. Check that INT pin is low. Check that Data overrun flag (DOR) is set (overrun really occurred).
8. Disable DO Interrupt and check it was disabled. Enable DO Interrupt and check it was enabled.
9. Mask DO Interrupt and check it was masked. Un-mask DO Interrupt and check it was un-masked.
int_fcs_feature_tb.vhdInterrupt EPI feature test.
1. FCS Interrupt is set when unit turns from Error Active to Error Passive.
2. FCS Interrupt is set when unit turns from Error Passive to Bus-off.
3. FCS Interrupt is set when unit turns from Error Passive to Error Active.
4. FCS Interrupt is set when unit turns from Bus-off to Error Active.
5. FCS Interrupt is not set when it is masked.
6. FCS Interrupt causes INT to go high when it is enabled.
7. FCS Interrupt causes INT to go low when it is disabled.
8. FCS Interrupt is cleared by write to INT_STATUS register.
9. FCS Interrupt enable is manipulated properly by INT_ENA_SET and INT_ENA_CLEAR. @10. FCS Interrupt mask is manipulated properly by INT_MASK_SET and INT_MASK_CLEAR.
1. Unmask and enable FCS Interrupt, disable and mask all other interrupts on Node 1. Enable test mode (to manipulate with Error counter registers). Keep ERP/EWL values default.
2. Check unit is error active. Set TX Error counter to 128. Check unit is Error passive. Check FCS Interrupt is present. Check that INT pin is high.
3. Disable FCS Interrupt and check INT pin goes low. Enable FCS Interrupt and check INT pin goes high.
4. Clear FCS Interrupt. Check it is cleared.
5. Set TX Error counter to 127. Check unit is Error active. Check that FCS Interrupt is set. Check INT pin is high.
6. Clear EPI Interrupt. Check FCS Interrupt is cleared.
7. Set TX Error counter to 196. Check EPI Interrupt is set. Clear FCS Interrupt.
8. Set TX Error counter to 256. Check that unit is Bus-off. Check that FCS Interrupt is set. Check INT pin is high.
9. Clear FCS Interrupt. Check it is cleared. Check INT pin is low. @10. Issue ERCRST command. Wait till unit turns Error Active. This does not test proper duration after which unit turns Error active (128 ocurrences of 11 consecutive Recessive bits)!!! Meanwhile check that FCS Interrupt is not set.
11. When Unit turns error active, check that FCS Interrupt is set. Check INT pin is high. Clear FCS Interrupt.
12. Mask FCS Interrupt. Set RX Error counter to 128. Check Unit is Error Passive. Check FCS Interrupt is not set. Check INT pin is low.
13. Disable FCS Interrupt and check it was disabled. Enable FCS Interrupt and check it was enabled.
14. Mask FCS Interrupt and check it was masked. Un-mask FCS Interrupt and check it was un-masked.
invalid_configs_feature_tb.vhdFeature test for frame transmittion with invalid combination of CAN frame configurations.
1. When CAN FD frame with RTR bit is sent, RTR bit is ignored and CAN FD frame without RTR bit set is received!
2. When CAN 2.0 frame with BRS bit is sent, BRS bit is ignored and CAN 2.0 frame without BRS bit is received!
1. Send CAN FD frame with RTR bit set and check it is received without RTR.
2. Send CAN 2.0 frame with BRS bit set and check it is received without BRS.
retr_limit_feature_tb.vhdRetransmitt limit feature test
1. When retransmitt limit is disabled, core does not stop re-transmitting after retransmitt limit number of retransmissions was reached (retransmitts indefinitely).
2. When retransmitt limit is set to 15 (maximum) and retransmitt limitation is enabled, core retransmitts 15 times. After 15 retransmissions, core does not retransmitt anymore.
3. Core retransmitts 'retransmitt limit' times when 'retransmitt limit' is enabled.
4. When transmission fails as result of Error frame, this counts as re-transmission and retransmitt counter is incremented.
5. When transmission fails as result of Arbitration loss, this counts as re-transmission and retransmitt counter is incremented.
1. Set retransmitt limit to 1 in Node 1. Enable retransmitt limitations. Set Acknowledge forbidden mode in Node 2 (to produce ACK errors). Turn on Test mode in Node 1 (to manipulate error counters).
2. Generate frame and start sending the frame by Node 1. Wait until error frame occurs and transmission is over two times.
3. Check transmission failed and transmitting TXT Buffer is "TX Error".
4. Disable retransmitt limitions in Node 1. Start sending a frame by Node 1. Wait until error frame and check that transmitting TXT Buffer is "Ready" again (hitting current retransmitt limit did not cause stopping retransmissions when retransmitt limit is disabled).
5. Abort transmission by Node 1. Wait until transmission was aborted.
6. Generate random retransmitt limit (between 1 and 14). Enable retransmitt limitation in Node 1. Erase TX error counter in Node 1. Erase TX Error counter.
7. Send frame by Node 1. Monitor that after initial transmission and after each next re-transmission sending TXT Buffer in Node 1 is "Ready". After 'retransmitt limit' retransmissions check that sending TXT Buffer in Node 1 is in state "TX Error".
8. Check that value of TX Error counter in Node 1 is equal to: (retr_lim + 1) * 8.
9. Set retransmitt limit to 15 and Enable Retransmissions in Node 1. Start Sending frame by Node 1. @10. Monitor that after initial transmission and after each next re-transmission sending TXT Buffer in Node 1 is "Ready". After 'retransmitt limit' retransmissions check that sending TXT Buffer in Node 1 is in state "TX Error".
11. Set retransmitt limit to 0 in Node 1. Insert frames for transmission to Node 1 and Node 2 simultaneously to invoke arbitration. ID of frame in Node 1 is higher than the one in Node 2 (to loose arbitration). Wait until node 1 is in Control field of a frame. Check that Node 1 is receiver (arbitration was really lost) and TXT Buffer in Node 1 ended up in "TX Error" state.
retr_limit_2_feature_tb.vhdRetransmitt limit feature test 2 (cornercases).
1. When TXT Buffer from which core transmits is changed between two consecutive transmissions, retransmitt counter is cleared!
2. When there are multiple errors during single frame, retransmitt counter is incremented only by 1!
3. When there is Arbitration lost and Error frame during single frame, retransmitt counter is incremented only by 1!
4. When unit is a receiver without attempt to transmitt a frame (TXT Buffer is ready, unit is Error passive and dominant bit is detected during Suspend field), if an error occurs during such a frame, retransmitt counter is not incremented!
1. Configure retransmitt limit in Node 1, enable retransmitt limitation. Enable Test Mode in Node 1 to be able manipulate with Error counters. Configure Node 2 to Acknowledge Forbidden Mode to invoke transmission of Error frames during test. Configure TXT Buffer 1 in Node 1 with priority 1, TXT Buffer 2 in Node 1 with priority 2.
2. Send frame from TXT Buffer 1 by Node 1. After 2 transmit attempts, insert frame to TXT Buffer 2 and mark TXT Buffer 2 as ready! Check that retransmitt counter is equal to 2!
3. Wait until transmission starts by Node 1. Check that TXT Buffer 2 was selected for transmission. Check that retransmitt limit is 0 now (because TXT Buffer used is changed).
4. Check that 'retransmit limit - 1' times TXT Buffer 2 ends up in TX Ready after transmission of an Error frame. Check that after 'retransmit limit' retransmissions, TXT Buffer 2 ends in TX Error. This verifies that previous retransmissions were not counted in transmission from TXT Buffer 2. Meanwhile, issue Abort command to TXT Buffer 1, so that we don't continue transmissions from TXT Buffer 1 after retransmitt limit was reached on TXT Buffer 2.
5. Check that Retransmitt counter is 0 now!
6. Clear TX Error counter in Node 1. Check it is 0. Send frame from TXT Buffer 1. Send frame from TXT Buffer by Node 2.
7. Wait until error frame (due to ACF in Node 2), corrupt bus level for duration of 6 bits, force bus level to be recessive.
8. Wait until transmission is over. Check that TXT Buffer 1 is in TX Ready, Retransmitt counter is 1. Check that TX Error counter is (6+1)*8 = 56 (One increment as original missing ACK, 6 increments due to six errors in Error frame). Wait until TXT Buffer 1 ends up in TX Error state. Check Retransmitt counter is 0. Wait Until bus is idle.
9. Insert frame with CAN ID = 10 to Node 1, CAN ID = 9 to Node 2. Send frame by both Nodes! Wait until Arbitration field. Check that both Nodes are transmitters. Wait until Control field. Check that Node 1 is receiver now and Node 2 is still transmitter. Check that Retransmitt counter in Node 1 is now 1. @10. Wait until ACK field. Force ACK field to be low during whole duration of ACK field. Wait until change in Protocol control, check that Error frame is being transmitted. Wait until Intermission field, check that Retransmitt counter in Node 1 is still equal to 1. Wait until TXT Buffer ends up in TX Error (after some retransmissions). Check that retransmitt counter is now 0 in Node 1. Wait until bus is idle.
retr_limit_3_feature_tb.vhdRetransmitt limit feature test 3 (cornercases).
1. When unit is a receiver without attempt to transmitt a frame (TXT Buffer is ready, unit is Error passive and dominant bit is detected during Suspend field), if an error occurs during such a frame, retransmitt counter is not incremented!
1. Configure retransmitt limit in Node 1, enable retransmitt limitation. Enable Test Mode in Node 1 to be able manipulate with Error counters. Configure Node 2 to Acknowledge Forbidden Mode to invoke transmission of Error frames during test.
2. Set Node 1 TX Error counter to 150. Check that Node 1 is Error Passive. Send frame by Node 1. Wait until Error frame occurs. Check that Retransmit counter in Node 1 is now 1. Insert frame to Node 2. Wait until Suspend transmission in Node 1.
3. Wait until Arbitration field in Node 1, check that Node 1 is now receiver. Wait until ACK field, force the bus for the whole duration of ACK field to Recessive. Check that Error frame is transmitted by Node 1. Wait until bus is Idle. Check that Retransmitt counter is stil1 1.
one_shot_feature_tb.vhdOne shot mode feature test (Retransmitt limit = 0).
1. One shot mode - Retransmitt limit enabled and set to 0. Verifies there is only one atempt to transmitt a frame in one shot mode
2. When One shot mode is not set (retransmit limit = 0, but disabled), core does not stop re-transmitting after retransmitt limit number of retransmissions was reached (retransmitts indefinitely).
3. When transmission fails as result of Error frame, device in One shot mode does not transmitt anymore!
4. When transmission fails as result of Arbitration loss, device in One shot mode does not transmitt anymore!
1. Set retransmitt limit to 0 in Node 1. Enable retransmitt limitations. Set Acknowledge forbidden mode in Node 2 (to produce ACK errors). Turn on Test mode in Node 1 (to manipulate error counters).
2. Generate frame and start sending the frame by Node 1. Wait until error frame occurs and transmission is over.
3. Check transmission failed and transmitting TXT Buffer is "TX Error".
4. Disable retransmitt limitions in Node 1. Start sending a frame by Node 1. Wait until error frame and check that transmitting TXT Buffer is "Ready" again (hitting current retransmitt limit did not cause stopping retransmissions when retransmitt limit is disabled).
5. Abort transmission by Node 1. Wait until transmission was aborted.
6. Insert frames for transmission to Node 1 and Node 2 simultaneously to invoke arbitration. ID of frame in Node 1 is higher than the one in Node 2 (to loose arbitration). Wait until node 1 is in Control field of a frame. Check that Node 1 is receiver (arbitration was really lost) and TXT Buffer in Node 1 ended up in "TX Error" state.
overload_feature_tb.vhdOverload frame feature test
1. Overload frame is transmitted as a result of sampling dominant during first and second bit of intermission.
2. Overload frame is transmitted as a result of sampling dominant during last bit of end of frame by receiver.
3. Error frame is transmitted as a result of sampling dominant bit during last bit of end of frame by transmitter.
1. Send frame by Node 1. Wait until first bit of intermission in Node 1 and force bus level Dominant. Check that Node 1 transmitts Overload frame. Wait until the end of overload frame in Node 1.
2. Check that we are in "Intermission field now". Wait until second bit of Intermission and force bus low. Wait until sample point and check that Node has transmitted Overload frame. Wait until the end of Overload frame. Wait until bus is idle for both Nodes.
3. Send frame by Node 1. Wait until last bit of End of Frame field of Node 1. Force bus low. Check that Node 1 reacts with Error frame. Check that Node 2 reacts with Overload frame.
no_sof_tx_feature_tb.vhdNo Start of Frame feature test - frame transmission!
1. When a dominant bit is sampled in Bus idle and a frame is available for transmission, its transmission is started without transmitting SOF bit.
2. When CTU CAN FD joins transmission without transmitting SOF bit, it accounts SOF bit as transmitted dominant bit in number of equal conse cutive bits.
1. Configure both Nodes to one-shot mode.
2. Insert CAN frames which have first 5 bits of identifier equal to zero to both nodes. Check both nodes are Idle. Wait till Sample point in Node 1.
3. Send Set ready command to both nodes. Wait until Node 1 is not in Bus idle state. Check it is transmitting Base Identifier (NOT SOF)!
4. Wait until sample point 5 times (5th bit of idetifier) in Node 1. Check Node 1 is transmitting Recessive bit (Stuff bit).
5. Wait until frame is over. Check frame was received OK, read it from receiving node and verify it was received OK!
rec_saturation_feature_tb.vhdREC (RX Error counter) saturation feature test.
1. REC is saturated at its width (9 bits) and further errors in receiver will not cause its overflow.
1. Set Test mode in Node 1. Disable CAN FD support in Node 1 and Set REC to 510 in Node 1. Check that REC is 510.
2. Send CAN FD frame by Node 2 few times. Wait until CAN frame is sent and check that REC in Node 1 is 511 after first frame (was incremented by 1) and also after each next attempt to transmitt a frame.
rx_settings_rtsop_feature_tb.vhdRX Settings Timestamp options feature test.
1. RX frame timestamp in sample point of SOF.
2. RX frame timestamp in sample point of EOF.
3. RX frame timestamp when receiving CAN frame without SOF.
1. Configure timestamp to be captured in SOF. Set Loopback mode in Node 1 (so that we are sure that SOF is transmitted). Generate CAN frame and issue it for transmission by Node 1. Wait until Node 1 turns transmitter and wait till Sample point. Capture timestamp and wait till frame is sent Check that RX frame timestamp is equal to captured timestamp!
2. Generate CAN frame for transmission and send it by Node 2. Poll until Node 1 becomes receiver (this should be right after sample point of Dominant bit in Idle which is interpreted as SOF) and capture timestamp. Wait until CAN frame is sent and check that RX frame timestamp is equal to captured timestamp.
3. Configure timestamp to be captured at EOF. Generate CAN frame and send it by Node 2. Wait until EOF and then until EOF ends. At EOF end, capture timestamp and wait till bus is idle! Compare captured timestamp with RX frame timestamp.
rx_status_feature_tb.vhdRX Buffer status feature test implementation.
1. RX Buffer size is read and buffer is cleared.
2. Free memory, buffer status and message count is checked.
3. Random frames are sent on the bus by node 2 and recieved by node 1
4. After each frame amount of remaining memory is checked towards expected value.
5. When buffer is filled Data overrun flag is checked and cleared.
6. After clearing Overrun flag, it is checked it was really cleared.
rx_status_mof_feature_tb.vhdRX Buffer status MOF (middle of frame) feature test implementation.
1. Repeat 10 loops of:
1.1 Check that RX_STATUS[MOF] is 0 in Node 1 (no frame stored in RX Buffer). Send frame by Node 2, wait till it is send, and check RX_STATUS[MOF] is still zero.
1.2 Read one word from RX_DATA, and check that RX_STATUS[MOF] is set. Read rest of the frame, word by word and check that RX_STATUS[MOF] is set. Check that after last read, it is not set anymore.
rx_buf_empty_read_feature_tb.vhdRX Buffer empty - read feature test
1. Verifies that when reading from empty RX Buffer, RX pointer is not incremented!
1. Read pointers from RX Buffer, check pointers are 0 (DUT is post reset).
2. Try to read CAN frame from RX Buffer. This should generate at least 4 reads from RX DATA register.
3. Read pointers from RX Buffer, check pointers are still 0.
tx_counter_feature_tb.vhdTX Traffic counter feature test implementation.
1. TX Counter is incremented after each succesfully transmitted frame.
2. TX Counter is not incremented when error frame is transmitted.
3. RX Counter is not incremented when frame is succesfully transmitted.
4. TX Counter is cleared by COMMAND[TXFRCRST].
5. TX Counter is NOT cleared by COMMAND[RXFRCRST].
1. Read TX Counter from Node 1. Set One-shot mode (no retransmission) in Node 1.
2. Send frame from Node 1. Wait until EOF field. Read TX counter and check it did not change yet.
3. Wait until the end of EOF. Read TX counter and check it was incremented. Read RX counter and check it is not incremented!
4. Send Frame from Node 1. Wait till ACK field. Corrupt ACK field to be recessive. Wait till Node 2 is not in ACK field anymore. Check Node 1 is transmitting Error frame.
5. Wait until Node 2 also starts transmitting error frame. Wait until bus is idle, check that TX Counter was not incremented in Node 1.
6. Send random amount of frames by Node 1 and wait until they are sent.
7. Check that TX counter was incremented by N!
8. Issue COMMAND[RXFRCRST] and check TX counter was NOT cleared in Node 1.
9. Issue COMMAND[TXFRCRST] and check TX counter was cleared in Node 1.
rx_counter_feature_tb.vhdRX Traffic counter feature test implementation.
1. RX Counter is incremented after each succesfully received frame.
2. RX Counter is not incremented when error frame is transmitted.
3. TX Counter is not incremented when frame is succesfully received.
4. RX Counter is cleared by COMMAND[RXFRCRST].
5. RX Counter is NOT cleared by COMMAND[TXFRCRST].
6. RX Counter is incremented when frame is transmitted in Loopback mode.
1. Read TX Counter from Node 1. Set One-shot mode (no retransmission) in Node 1.
2. Send frame from Node 2. Wait until EOF field. Read RX counter from Node 1 and check it did not change yet.
3. Wait until the end of EOF. Read RX counter and check it was incremented. Read TX counter and check it is not incremented!
4. Send Frame from Node 2. Wait till ACK field. Corrupt ACK field to be recessive. Wait till Node 2 is not in ACK field anymore. Check Node 2 is transmitting Error frame.
5. Wait until Node 1 also starts transmitting error frame. Wait until bus is idle, check that RX Counter was not incremented in Node 1.
6. Send random amount of frames by Node 2 and wait until they are sent.
7. Check that RX counter was incremented by N in Node 1!
8. Issue COMMAND[TXFRCRST] and check RX counter was NOT cleared in Node 1.
9. Issue COMMAND[RXFRCRST] and check RX counter was cleared in Node 1. @10. Read all frames from RX buffer in Node 1.
11. Set Loopback mode in Node 1. Send frame by Node 1 and wait until it is sent. Check there is a frame received in RX buffer. Check that RX frame counter was incremented.
settings_tbfbo_feature_tb.vhdTX Buffer bus of behavior setting feature test.
1. When SETTINGS[TBFBO]=1, then all TXT Buffers will go to TX Failed when node is going to bus-off.
2. When SETTINGS[TBFBO]=0, then transmitting TXT Buffer will go to Ready and after re-integration, node will transmitt again!
1. Configure SETTINGS[TBFBO]=1 in Node 1. Set TEC of Node 1 to 254. Send frame by Node 1.
2. Wait until first bit of EOF and force CAN RX of Node 1 to Dominant. This creates error condition, and Node 1 will transmitt error frame. Wait till error frame is over. Check that Node 1 is bus-off. Check that all its TXT Buffers are in TX Failed state.
3. Turn off Node 1, configure SETTINGS[TBFBO]=1 in Node 1, then turn it on again. Wait till integration is over. Issue COMMAND[ERCRST] (in advance, shall be captured by DUT) to Node 1. Set TEC of Node 1 to 254.
4. Send frame by Node 1. Wait till first bit of EOF, force CAN RX of Node 1 to Dominant value. Wait till error frame is over, check that Node 1 is bus-off. Check that TX Buffer that was used for transmission is in TX ready.
5. Poll on fault confinement state of Node 1 until in comes out of bus-off. When it happends, check that Node becomes transmitter on TXT Buffer used for transmission before went to "TX in progress" state.
single_bus_node_feature_tb.vhdSingle bus node test
1. Node which is single on bus (other node is not transmitting, acking, sending error frames), will turn error passive and not bus-off when trying to transmitt a frame!
1. Disable Node 2, disable retransmitt limit in Node 1.
2. Transmitt frame by Node 1.
3. Wait until error frame starts and check that error counter is incremented by 8. Repeat until node turns error passive!
4. Wait for several times that node transmitts a frame and check that after each, TX Error counter is not incremented.
ssp_cfg_feature_tb.vhdSSP_CFG register feature test.
1. When SSP_CFG[SSP_SRC] = SSP_OFFSET, position of secondary sampling point will be given only by SSP_OFFSET.
2. When SSP_CFG[SSP_SRC] = SSP_SRC_NO_SSP, there will be no SSP and regular sample point will be used to detect bit error by bit-error detector!
3. When SSP_CFG[SSP_SRC] = SSP_SRC_MEAS_N_OFFSET, position of secondary sampling point will be given as SSP_OFFSET + TRV_DELAY.
4. Position of Secondary sampling point is saturated to 255.
5. Transmitter detecting bit error in SSP will transmitt error frame at nearest regular sample point, not earlier!
1. Generate random TRV_DELAY between 0 and 125. Configure it in TB as delay between CAN TX and CAN RX.
2. Generate random SSP_CFG[SSP_SRC]. If it is offset only, generate SSP_OFFSET which is higher than TRV_DELAY. If it is SSP_SRC_MEAS_N_OFFSET, set SSP_OFFSET to random value between 0 and 255. Saturate calculated value of SSP_SRC at 255. If it is SSP_SRC_NO_SSP, calculate SSP position from regular data-bit rate.
3. Generate random CAN FD frame with bit-rate shift. Wait until bit-rate is shifted and wait for random number of bits (but do not exceed length of data phase). Wait until edge on CAN TX or CAN RX. Store transmitted value on CAN TX after the edge. Wait for expected position of Secondary sample point - 3 clock cycles.
4. Now we are 3 clock cycles before Secondary sampling point. Force bus to opposite value than was sent. Check that Secondary sample point is active (via Status Bus), if SSP_CFG[SSP_SRC] /= SSP_SRC_NO_SSP. Check that it is not active when SSP_CFG[SSP_SRC] = SSP_SRC_NO_SSP.
5. Wait for one clock cycle and if SSP_CFG[SSP_SRC] = SSP_SRC_NO_SSP, error frame is being transmitted (regular sample point should be used to detect bit errors). If SSP_CFG[SSP_SRC] /= SSP_SRC_NO_SSP check that Error frame is not transmitted and wait until nearest Sample point. Check that after this sample point, error frame is transmitted. Wait until bus is idle in both nodes.
status_rxne_feature_tb.vhdSTATUS[RXNE] feature test.
1. When no frame is stored in RX Buffer, STATUS[RXNE] is not set.
2. When one or more frames is stored in RX Buffer, STATUS[RXNE] is set.
3. STATUS[RXNE] is not set when last word of last frame in RX Buffer is read.
1. Read STATUS[RXNE] of Node 1 and check it is not set. Send random amount of CAN frames by Node 2 and wait until they are received. Check that after each one, STATUS[RXNE] is set.
2. Read out frame by frame and check that STATUS[RXNE] is still set. Read all frames but last one.
3. Read out last frame word by word and check that STATUS[RXNE] is still set and STATUS[RXNE] is not set after reading out last word.
status_txnf_feature_tb.vhdSTATUS[TXNF] feature test.
1. When no TXT Buffer is in Empty state, STATUS[TXNF] is not set.
2. When at least on TXT Buffer is in Empty state STATUS[TXNF] is set.
1. Set BMM mode in Node 1. Check that STATUS[TXNF] is set (all TXT Buffers should be empty).
2. Issue Set ready consecutively to all TXT Buffers. Check that STATUS[TXNF] is set before last buffer. Check that after last buffer STATUS[TXNF] is not set.
3. Check that all TXT Buffers are Failed now. Move always single buffer to empty and check that STATUS[TXNF] is set. Move this buffer to Failed again and check that STATUS[TXNF] is not set. Repeat with each TXT Buffer.
status_eft_feature_tb.vhdSTATUS[EFT] feature test.
1. STATUS[EFT] is is set when Error frame is transmitted during Error active and Error passive.
2. STATUS[EFT] is not set when Error frame is not being transmitted.
1. Set Node 2 to ACF mode. Enable test mode in Node 1. Send frame by Node 1. Randomize if Node 1 will be error active or error passive. Monitor STATUS[EFT] and check that it is not set during whole duration of the frame. Wait till ACK field.
2. Wait till Node 1 is NOT is ACK field anymore. Now since ACK was recessive, Node 1 should be transmitting error frame! Monitor STATUS[EFT] and check it is set until Node 1 gets to Intermission. Check it is not set after Intermission has started! Monitor STATUS[EFT] and check it is not set during whole time until unit is Bus Idle!
status_txs_feature_tb.vhdSTATUS[TXS] feature test.
1. STATUS[TXS] is set when unit is transmitter.
2. STATUS[TXS] is not set when unit is receiver.
1. Send frame by Node 1. Wait until SOF starts and check that STATUS[TXS] is not set till SOF. From SOF further monitor STATUS[TXS] and check it set until the end of Intermission. Check that after the end of intermission, STATUS[TXS] is not set anymore.
2. Send frame by Node 2. Monitor STATUS[TXS] of Node 1 until Intermission and check STATUS[TXS] is not set. Monitor until the end of intermission and check STATUS[TXS] is not set.
status_rxs_feature_tb.vhdSTATUS[RXS] feature test.
1. STATUS[RXS] is set when unit is receiver.
2. STATUS[RXS] is not set when unit is transmitter.
1. Send frame by Node 2. Wait until SOF starts and check that STATUS[RXS] is not set till SOF in Node 1. From SOF further monitor STATUS[RXS] and check it set until the end of Intermission. Check that after the end of intermission, STATUS[RXS] is not set anymore.
2. Send frame by Node 1. Monitor STATUS[RXS] of Node 1 until Intermission and check STATUS[RXS] is not set. Monitor until the end of intermission and check STATUS[RXS] is not set.
status_ewl_feature_tb.vhdSTATUS[EWL] feature test.
1. When RX Error counter (REC) is higher than EWL, then STAT[EWL] is set.
2. When TX Error counter (TEC) is higher than EWL, then STAT[EWL] is set.
3. When both REC and TEC are lower than EWL, STAT[EWL] is not set.
1. Set Node 1 in test mode. Generate random EWL and configure it. Generate random REC and TEC and set them in Node 1. Pre-calculate if STAT[EWL] shall be set and check it.
status_idle_feature_tb.vhdSTATUS[IDLE] feature test.
1. STATUS[IDLE] is set when bus is idle (no frame is in progress).
2. STATUS[IDLE] is not set when unit is transmitting or receiving a frame.
3. STATUS[IDLE] is set when unit is bus-off!
1. Check that STATUS[IDLE] is set. Transmitt CAN frame by Node 1 wait till SOF and check that STATUS[IDLE] is not set. Wait until the end of frame and check that after the end of Intermission STATUS[IDLE] is set again!
2. Transmitt CAN frame by Node 2, wait till arbitration field in Node 1 and check that STATUS[IDLE] is not set. Wait until the end of frame and check that STATUS[IDLE] is set after the end of intermission.
3. Set Node 1 to Bus-off by the means of modifying TX Error counter and check it is bus-off. Check that STATUS[IDLE] is set.
stuff_in_data_feature_tb.vhdStuff bit on last bit of Data field.
1. When stuff bit is inserted after last bit of Data field, no extra stuff bit will be inserted during first bit of Stuff count (with fixed stuffing). Wait until frame is sent. Read frame and check it is received succesfully!
1. Generate CAN frame which has last 5 bits of data field dominant! Send it by Node 1. Wait until frame is sent and read it from Node 2. Check that frames are equal. Note: The check is only visual so far...
trv_delay_feature_tb.vhdTransceiver delay measurement feature test.
1. Transceiver delay measurement in its range (2 - 127).
2. Shadowing of TRV_DELAY register (register updated only at the end of measurement).
3. TRV_DELAY measuremenr does not overflow when measuring delay longer than 127 clock cycles.
1. Configure SSP Offset to 7 + TRV_DELAY and SSP source to use Measured value + offset in Node 1. Configure bit-rate to 250 Kbit/s in Nominal bit-rate. This-way bit-error detection will not get confused on high TRV Delays!
2. Configure delay to 1 ns in TB. Run CAN FD frame and verify that measured delay is correct!
3. Configure delay to 1255 ns in TB. Run CAN FD frame and verify that measured delay is 127.
4. Configure Transmitter delay to 130. Run CAN FD frame and verify that measured value is 127 (value has not overflown!).
5. Configure transmitter delay to random value between 0 and 126. Run CAN FD frame and check it is measured correctly!
tx_from_intermission_feature_tb.vhdStart of transmission from Intermission
1. Transmission is started when Node detects Dominant bit during third bit of intermission and it has frame for transmission available.
2. Reception is started when Node detectes Dominant bit during third bit of Intermission and it has no frame for transmission available.
1. Insert CAN frame for transmission into Node 2. Wait until transmission will be started. Insert CAN frame to Node 1 during transmission of frame from Node 2 and wait until Intermission.
2. Wait for two sample points and force the bus dominant during third bit of intermission for Node 1. Wait until sample point, and check that Node 1 started transmitting. Check that Node 1 is in "arbitration" phase. Check that Node 1 is NOT in SOF. Wait until frame is sent, and check it is properly receieved by Node 2 (Node 2 should have turned receiver).
tx_arb_time_tran_feature_tb.vhdTX arbitration and time transmittion feature test
1. Frame is transmitted from TXT Buffer at time given by Timestamp in TIMESTAMP_U_W and TIMESTAMP_L_W words.
2. When timestamp in TIMESTAMP_U_W and TIMESTAMP_L_W is lower than actual timestamp input of CTU CAN FD, frame is transmitted immediately.
3. When timestamp of a frame in higher priority TXT buffer is not yet elapsed, but timestamp of a frame in lower priority TXT buffer has already elapsed, frame from lower priority buffer is not transmitted before frame from higher priority buffer.
1. Configure random timestamp to testbench. Generate random frame and insert it for transmission from TXT Buffer 1 of Node 1. Generate random time of transmission for the frame and Issue "set ready" command for TXT Buffer 1. Wait until node turns transmitter! Read current timestamp from TB and check that difference between expected time of transmission and actual time when transmission started is less than 1 bit time (transmission is not processed immediately, but in each sample point). Wait until frame is sent.
2. Generate CAN frame for transmission with timestamp lower than actual value of timestamp input of CTU CAN FD. Insert it for transmission and issue "set ready" command to this TXT Buffer. Wait until transmission starts and check that difference between start of transmission and time when "set ready" command was sent is less than 1 bit time. Wait until frame is sent.
3. Configure TXT Buffer 1 to higher priority than TXT Buffer 2. Insert CAN frame with earlier time of transmission to TXT Buffer 1. Mark both frames as ready. Wait until both frames are transmitted! Check that first frame from Node 1 was transmitted!
tx_status_feature_tb.vhdTX Status feature test.
1. TXT Buffer is Empty after reset
2. TXT Buffer is OK after successfull transmission.
2. TXT Buffer is Failed after transmission fails from this buffer!
3. TXT Buffer is Aborted after Set Abort command was issued during transmission.
1. Reset Node, Enable it, and wait until it integrates. Pick random TXT Buffer which will be used during this test. Check that TXT Buffer is empty.
2. Transmitt CAN Frame by Node 1 and wait until it is received in Node 2. Check that TXT Buffer is OK.
3. Set ACK Forbidden mode in Node 2. Set One shot mode in Node 1. Send frame by Node 1 and wait until it is sent. Check that TXT Buffer is in TX Failed.
4. Send CAN frame and when it starts, issue Set Abort Command. Wait until frame is sent and check that TXT Buffer is in Aborted. Note: Ready, TX in Progress and Abort in Progress are not tested here as they are checked in tx_cmd_set_ready/empty/abort test case.
timestamp_low_high_feature_tb.vhdFeature test for Timestamp options on RX frame in RX Buffer!
1. TIMESTAMP_LOW and TIMESTAMP_HIGH registers functionality.
1. Preset Timestamp value in TB. Read values from TIMESTAMP_LOW and TIMESTAMP_HIGH registers. Check read value matches value which was preset.
txt_buffer_hazard_feature_tb.vhdTXT Buffer datapath hazard feature test.
1. When Lock command is issued on Protocol control at the same time as Set Abort command, Lock command will have priority.
2. TXT Buffer will never end up Aborted when Protocol control succesfully locks TXT Buffer for transmission!
1. Insert frame to TXT Buffer
2. Mark the buffer as ready and wait for incrementing time.
3. Send set_abort command.
4. Readout status of TXT buffer.
5. If the buffer is "Aborted", check that no transmission is in progress (via STATUS), throw an error if not.
6. If the buffer is "Abort in progress" check that transmission is in progress and wait till its end. Throw an error if not.
7. If buffer is in any other state, throw an error. Set Abort command should not be missed by HW!
tx_cmd_set_abort_feature_tb.vhdTXT Buffer Set Abort - SW command (TX_COMMAND) feature test.
1. Set Abort command moves TXT Buffer from Ready to Aborted and from TX in progress to Aborted.
1. Generate frame and insert it for transmission to random TXT Buffer. Wait until sample point. Issue Set Ready command and check TXT Buffer becomes Ready. Issue Set Abort command and check TXT Buffer becomes Aborted. Bit time should be sufficiently long so that there is enough time to issue two commands and read buffer state ones before next sample point arrives.
2. Issue Set Ready command and wait until transmission starts. Check that TXT Buffer is in TX in progress. Issue Set Abort and check that TXT Buffer moves to Abort in progress. Wait until transmission is over.
tx_cmd_set_empty_feature_tb.vhdTXT Buffer Set empty - SW command (TX_COMMAND) feature test.
1. Set Empty command moves TXT Buffer from TX OK, TX Error, Aborted to Empty.
1. Check TXT Buffer is empty. Issue Set empty and check it is still empty.
2. Generate random CAN frame, send it from TXT Buffer and wait until it is received. Check TXT Buffer is in TX OK. Issue Set Empty command and check TXT Buffer is empty.
3. Generate random CAN frame, send it fom TXT Buffer and issue Set Abort command. Wait until frame is over and check TXT Buffer is Aborted. Issue Set Empty command and check it becomes Empty.
4. Set One shot mode in Node 1. Forbid ACK in Node 2. Send CAN frame by Node 1. Wait until CAN frame is sent and check TXT Buffer from which it was sent ended in TX Error. Issue Set empty command and check TXT Buffer is Empty.
tx_cmd_set_ready_feature_tb.vhdTXT Buffer Set ready - SW command (TX_COMMAND) feature test.
1. Set Ready command moves TXT Buffer from TX OK, TX Error, Aborted and Empty to Ready.
1. Check TXT Buffer is empty. Wait until sample point and issue Set ready and check it becomes Ready. Wait until frame is sent.
2. Check TXT Buffer state is TX OK. Wait until sample point and issue Set ready command. Check TXT Buffer is ready. Wait until frame is sent.
3. Wait until Sample point. Issue Set Ready and consecutively Set Abort. Check TXT Buffer is aborted. Issue Set Ready again and check it is Ready now!
4. Set One shot mode in Node 1. Forbid ACK in Node 2. Send CAN frame by Node 1. Wait until CAN frame is sent and check TXT Buffer from which it was sent ended in TX Error. Wait unitl sample point. Issue Set Ready command and check TXT Buffer is Ready
tx_arb_consistency_feature_tb.vhdTX Priority feature test.
1. If during TX frame validation by TX Arbitrator CAN Core issues lock command (another frame has been validated before), then first frame will be transmitted (in other words, TX arbitration mechanism will not corrupt consistency of data/metadata of CAN frame).
1. Generate two random frames and insert them to TXT Buffer 1 and 2. Configure priority of TXT Buffer 1 higher than TXT Buffer 2.
2. Wait until sample point and issue Set ready command to TXT Buffer 2.
3. Wait for nearly whole Bit time, and before next sample point, issue Set ready command to TXT Buffer 1. This will re-invoke TXT Buffer validation process with TXT Buffer 1. Time the command, so that when Lock command is issued by CAN Core, TX Arbitrator FSM is always in different state of TX frame validation.
4. Wait until frame is sent, and verify that either frame 2 or frame 1 were sent (it depends on when did the validation finish, which depends on delay between frames!). This verifies that no part of metadata has been taken from other frame, and frame was validated atomically!
tx_priority_feature_tb.vhdTX Priority feature test.
1. TX_PRIORITY register gives priority of TXT Buffers in selection for transmission.
2. TXT Buffer with higher priority is selected for transmission.
3. When TXT Buffer of higher priority is not Ready, it will not be selected for transmission.
4. When two TXT Buffers have equal priority, TXT Buffer with lower priority is selected for transmission.
1. Generate random priorities of TXT Buffers and configure them in Node 1. Generate random mask of TXT Buffers which will actually be used for transmission. Generate random frames for transmission and insert them to Node 1.
2. Send atomic command to TXT Buffer 1 which will set all TX frames to Ready. Wait until expected amount of frames is received.
3. Check that frames are received in expected order.
tx_priority_change_feature_tb.vhdTX Priority change feature test.
1. When TX priority changes even if some TXT buffer is already selected in TX ready state, and with new priority settings another TXT Buffer has higher priority, this new TXT Buffer will be selected.
1. Select random priorities for TXT buffers and write them to TX Priority register. Generate random frames and store them to TXT Buffers.
2. Wait till sample point (+ some time more) and issue TX ready command to all TXT buffers. Read state of the TXT Buffers and check that they are all in ready state.
3. Select new random priorities and write them to TXT Buffers.
4. Wait until frame is sent, and check that received frame was sent from new highest priority TXT buffer.
sanity_test.vhdSanity test simulates real bus operation with 4 CTU CAN FD Cores connected on CAN Bus.
1. Communication of CTU CAN FD with real bus delay between units.
2. Communication with various topologies (Star, Bus, Tree)
3. Response to errors (bit flips on bus) injected to simulation.
4. Data consitency of communication (what has been send by 1 node must be received by all other nodes)!
1. Restart all nodes and configure bit timing. Turn all nodes on. Wait until integration is over.
2. Generate random frames and insert them to each CTU CAN FD instance for transmission. Store each frame that was pushed to each of CTU CAN FDs to auxiliarly memory (so called TX memory which monitors what all has been sent!) for each node.
3. Poll on RX Buffer and read out frames. Store read out frames in auxiliarly memories (RX memories) for each node.
4. Repeat generation of frames until RX memories are filled. Inject random bit noise to the bus.
5. When RX memories are filled, compare content of RX memories with TX memories of each other node! Each frame which was sent by a Node must be received by each other node (CAN bus needs to guarantee data consistency). If a frame which was sent is not found in RX memories of each other node, error is detected!
Bit_Stuffing_tb.vhdUnit test for bit stuffing and bit destuffing circuits.
1. Functionality of Bit Stuffing and Bit Destuffing modules.
1. Insertion of stuff bits after 5 bits of equal consecutive value.
2. Discarding of stuffing bits after 5 bits of equal consecutive value.
3. Fixed bit stuffing and Fixed bit destuffing. Stuff bit is inserted after 4 bits regardless of bit value.
4. Stuff Error detection if 6-th equal consecutive bit is received.
5. Recursive behaviour of bit stuffing (stuff bit counts as first bit in the next sequence of equal consecutive bits).
6. Insertion of Stuff bit upon change from non-fixed to fixed bit stuffing (modeling insertion of stuff bit before stuff count field of CAN FD frame).
1. Generate random bit sequence. Randomize whether at some point of the sequence, switch to fixed bit stuffing will occur.
2. Calculate expected sequence after bit stuffing (SW model).
3. Apply sequence on inputs of Bit Stuffing. Compare output of bit stuffing with expected bit coming out of SW model.
4. Stuffed sequence is destuffed with bit destuffing and compared with original generated sequence. Random stuff error is inserted. A check if bit error is detected is executed.
APB_tb.vhdSimple test of can_top_apb, performing register read/write via APB.
1. Read transactions to CTU CAN FD via APB.
2. Write transactions to CTU CAN FD via APB.
3. 32 bit and 16 bit transactions.
CRC_tb.vhdUnit test for the CRC circuit.
1. Calculation of CRC15, CRC17 and CRC21 according to 11898-1:2015.
2. Calculation of CRC15, CRC17 and CRC21 according to CAN FD specification 1.0 (non-iso version with different intialization vectors).
1. Generate random bit sequence between 10 and 620 bits long. Generate random setting of ISO/NON-ISO.
2. Calculate expected CRC results for this bit sequence (SW model).
3. Apply generated bit sequence to inputs of CRC module.
4. Compare results of SW model and CRC value on DUT outputs.
Int_Manager_tb.vhdUnit test for the Interrupt manager.
1. Interrupt enable, Interrupt mask and capturing of interrupts by Interrupt Manager module.
1. Generate random setting of Interrupt manager module (Interrupt enables, Interrupt masks).
2. Generate random inputs to Interrupt manager. Calculate expected results of Interrupt manager (SW model).
3. Compare results of Interrupt manager with SW model.
Message_filter_tb.vhdUnit test for the frame filters circuit.
1. Bit filter functionality (Filter value and filter mask).
2. Range filter functionality (Low and High thresholds).
1. Generate random bit values, bit masks for bit filters and low-high thresholds for range filter.
2. Generate random CAN ID and frame and identifier type on input of Frame filters.
3. Calculate whether frame shall pass filters (SW model).
4. Check whether output of frame filters equals to output of SW model.
Protocol_Control_tb.vhdUnit test for Protocol Control FSM.
1. CAN 2.0 frame with Base identifier format.
2. CAN FD frame with Base identifier format.
3. CAN 2.0 frame with Extended identifier format.
4. CAN FD frame with Extended identifier format.
5. Basic frame formats transmission and reception by Protocol control FSM.
1. Generate random frame on input of Protocol Control 1.
2. Calculate expected bit sequence (frame) on the CAN bus including ACK and EOF (SW model)!
3. Transmitt the frame by Protocol control 1 DUT and record transmitted bit sequence! Protocol control 2 DUT receives the bit sequence.
4. Compare if Expected bit sequence (SW model output) is equal to recorded one.
5. Compare if Generated frame (data,ident,type of frame...) inserted to Protocol control 1 for transmission is equal to received frame by Protocol control 2.
6. Loop points 1 to 6 until the number of iterations was reached!
RX_Buffer_tb.vhdUnit test for the RX Buffer circuit.
1. Storing protocol to RX Buffer (store metadata, store data word, reception valid, reception abort).
2. Storing of Metadata, Identifier and Data words to RX Buffer.
2. Reading protocol from RX Buffer. Reading of CAN frame from RX Buffer.
3. Over-run detection by RX Buffer (frame is discarded when overrun is detected).
4. Simultaneous commit and finishing read of frame from RX Buffer.
1. Generate random CAN frames on input of RX Buffer. Emulate storing protocol as if coming from CAN Core. Randomize whether abort will be issued. (As if error frame was occured). Randomize time between frames. Randomize timestamp capturing in SOF or EOF.
2. If Overrun is signalled or frame abort is issued, discard the frame. If frame storing finished succesfully, store the frame also to auxiliarly memory (Input memory). This memory contains what all has been stored to RX Buffer.
3. Read frames from RX Buffer with random gaps between (emulate read protocol). If frame is read, store it to auxiliarly memory (Output memory). Output memory contains what all has been read from RX Buffer.
4. When Input memory is filled, stop generating CAN frames to RX Buffer. Wait until all frames are read from RX Buffer and compare contents of Input memory and Output memory (everything what was succesfully stored to RX Buffer must be also in the same order read from RX Buffer). This verifies proper pointer handling.
TX_Arbitrator_tb.vhdUnit test for TX Arbitrator circuit
1. TODO
1. TODO
TX_Buffer_tb.vhdUnit test for the TX Buffer circuit
1. TODO
1. TODO
tb_reference.vhdTestbench for reference test.
1. Reception of random CAN frames by CTU CAN FD as transmited by reference CAN implementation.
1. Read CAN frame (ID, Data, DLC, RTR/BRS/FDF flags) and recorded bit sequence according to this frame from file set.
2. Transmit this bit sequence by bit stream generator. CTU CAN FD receives CAN frame.
3. Read received CAN frame from DUT and compare this CAN frame with frame read from file set. If frames are not equal, throw an error!